Semiconductor devices are essential for many modern applications. Among the semiconductor devices, memory devices such as dynamic random access memory (DRAM) devices have assumed an important role. The memory device includes several memory cells arranged in rows and columns over a substrate, wherein information of each memory cell is stored by a capacitor and is accessible by a bit line extending over a surface of the substrate.
With the advancement of electronic technology, capacity of the memory device continues to increase. In other words, a density of the memory cells arranged over the substrate is increased, and a size of each memory cell is decreased. As a result, a parasitic capacitance exists between components in the memory cell. The parasitic capacitance adversely affects a performance of the memory device.
Therefore, there is a continuous need to improve a structural configuration of the semiconductor device.
This Discussion of the Background section is provided for background information only. The statements in this Discussion of the Background are not an admission that the subject matter disclosed in this Discussion of the Background section constitutes prior art to the present disclosure, and no part of this Discussion of the Background section may be used as an admission that any part of this application, including this Discussion of the Background section, constitutes prior art to the present disclosure.